πŸ“Œ Overview

This lecture covers capacitors and inductors in linear circuits: their definitions, constitutive relations, energy storage, steady-state behavior, and interconnections (series/parallel). Recap of op-amps from previous week. Focus: ideal elements, voltage/current continuity, and solving examples under DC steady-state.

Goal: Understand how C and L store energy, behave in circuits, and simplify in steady-state for analysis.


🎯Learning Objectives

  • Define capacitance/inductance and derive i-v relations (differential/integral forms).
  • Calculate power and energy stored in C/L, including initial conditions.
  • Explain continuity of v_C(t) and i_L(t); steady-state as open/short.
  • Compute equivalent C in parallel/series; L in series/parallel.
  • Solve circuits with C/L under DC steady-state (e.g., exam-style problems).
  • Apply methods to examples, noting assumptions (ideal, linear, passive sign convention).

πŸ’‘Key Concepts & Definitions

Capacitor (C)

  • Physical: Stores energy in electric field (e.g., parallel plates: ).
  • Ideal: Only capacitance; real has leakage resistance.
  • Relations (passive sign: + at v, i into +):
    • Differential:
    • Integral:
  • Power:
  • Energy (from 0 at ): ; general:
  • Features:
    • Stores/releases electrostatic energy (no generation).
    • continuous (from integral form).
    • Steady-state DC (): open circuit ().
    • Discontinuities allowed in .

Inductor (L)

  • Physical: Stores energy in magnetic field (e.g., solenoid: ).
  • Ideal: Only inductance; real has winding R/C.
  • Relations (passive sign: + at v, i into +):
    • Differential:
    • Integral:
  • Power:
  • Energy (from 0 at ): ; general similar to C.
  • Features:
    • Stores/releases magnetic energy (no generation).
    • continuous (from integral form).
    • Steady-state DC (): short circuit ().
    • Discontinuities allowed in .

Interconnections

  • C Parallel: (same v, i sums by KCL).
  • C Series: (same i, v sums by KVL; charge equal).
  • L Series: (same i, v sums by KVL).
  • L Parallel: (same v, i sums by KCL).

βž— Formulas

Notes on Use: Assume ideal (no parasitics) unless specified. Passive convention essential for signs. Methods valid for linear C/L; non-linear rare in this course.


✍️ Notes

Recap: Op-Amps (Week 1.6)

  • Ideal: , , .
  • Assumptions: ; feedback .
  • Inverting: ; Non-inverting: .

Capacitor Details & Examples

Capacitors oppose voltage changes (integrate current to voltage).

Example 1: F, A, . Find , .

  • Step 1: V.
  • Step 2: V (exact: ).
  • Step 3: W? Wait, slide says 70.6Wβ€”recalc: i(2)=6(1-0.135)=5.19A, v=122 +0.135-1=23.135? Integral: , /0.5=12\tau +12e^{-\tau}$, v(t)=12t +12e^{-t}-12 (since v(0)=120+12-12=0). v(2)=24+12/e^2 -12β‰ˆ24+1.624-12=13.624V, i(2)=6(1-1/e^2)β‰ˆ6(1-0.135)=5.19A, p=13.624*5.19β‰ˆ70.7W. Yes.
  • Allowed: Initial v=0; continuous v.

Example 2: F, i(t) triangular: 16ΞΌA (0-1ms), -8ΞΌA (1-2ms), repeat. v(0)=0. Find v(1ms), p(1ms), w(1ms).

  • Step 1: From 0-1ms, V (t in ms? Adjust units).
  • Assume t in s: at t=0.001s, v=4V.
  • p(t)=v i=4t *16e-6 (at peak).
  • w=1/2 C v^2=1/2 *4e-6 *16=32e-6 J at t=1ms (v=4V).
  • Rare: Periodic i periodic v after steady.

Visual: Parallel-Plate Capacitor

DielectricΒ²PlatesareaA,sepd+Β‘

C Interconnect Example: 3ΞΌF || 2ΞΌF, series 4ΞΌF & 2ΞΌF, then || 12ΞΌF.

  • Parallel top: 3+2=5ΞΌF.
  • Series bottom: 1/(1/4+1/2)=1/(0.25+0.5)=1/0.75=1.333ΞΌF? Wait, slide: overall calc.
  • Step: Bottom series 4||2? No: diagram likely (3||2) series (4||2)? But slide: equiv 12ΞΌF? Compute properly in notes.

Inductor Details & Examples

Inductors oppose current changes (integrate voltage to current).

Example 1: H, . Find v(1), p(1).

  • Step 1: V.
  • v(1)=(1-4)e^{-4}= -3/e^4 β‰ˆ -3/54.6 β‰ˆ -0.055V.
  • i(1)=2(1)e^{-4}β‰ˆ2/54.6β‰ˆ0.0366A.
  • p(1)=v i β‰ˆ -0.0550.0366 β‰ˆ -0.002W? Slide: -6e^{-8}Wβ€”units? Recalc di/dt: product rule u=2t dv=e^{-4t}dt du=2, v=-1/4 e^{-4t}, di=2e^{-4t} - (2t)/2 e^{-4t} wait: di/dt=2 e^{-4t} + 2t (-4)e^{-4t}=2e^{-4t}(1-4t), L di/dt=0.52e^{-4t}(1-4t)=e^{-4t}(1-4t) V.
  • At t=1, e^{-4}β‰ˆ0.0183, 1-4=-3, v=-3*0.0183β‰ˆ-0.055V.
  • p=v i= -0.055 * 210.0183 β‰ˆ -0.055*0.0366β‰ˆ -0.002W, but slide -6e^{-8}? Perhaps misread; assume correct method.

Example 2: mH=0.2H, V. Find i(t), p(t), w(t).

  • Step 1: i(t)=i(0) +1/L ∫v dΟ„. i(0)=0.
  • ∫(1-3t)e^{-3t} dt : integration by parts, u=1-3t du=-3, dv=e^{-3t}dt v=-1/3 e^{-3t}.
  • ∫= u v - ∫v du = (1-3t)(-1/3 e^{-3t}) - ∫ (-1/3 e^{-3t}) (-3) = - (1-3t)/3 e^{-3t} - ∫ e^{-3t} dt = - (1-3t)/3 e^{-3t} +1/3 ∫ e^{-3t} dt wait: detailed in slide.
  • Result: i(t)= -5 (1 + 3t) e^{-3t} +5 e^{-6t} mA? Slide: 5 exp(-3t) -5(1+3t)exp(-3t) or similar; approx i(t)= -5 e^{-3t} mA? Use formula.
  • p(t)=v(t) i(t)= 5e-6 (1-3t)^2 e^{-6t} W.
  • w(t)=1/2 L i^2(t)= 2.5e-6 (1-3t)^2 e^{-6t} ? Slide: 5e-6 exp(-6t) J? For zero initial.
  • Allowed: Continuous i; integration by parts for non-elementary ∫.

Visual: Solenoid Inductor

\usepackage{tikz}
\begin{tikzpicture}
\draw[thick] (0,0) coil (2,0) coil (0,1) -- cycle; % simplified coil
\node at (1,1.2) {N turns, core $\mu$};
\node at (1,-0.2) {Area A, length l};
\end{tikzpicture}

Steady-State DC with C/L (Exam Example)

Circuit: DC sources, R=20Ξ© branches, 3A source, 9A source, 6Ξ©? , L=4mH, C=? . Find V_C, I_L; then C s.t. w_C = w_L.

Stepwise Solution:

  1. Steady-State: C open (i_C=0), L short (v_L=0). Redraw: Remove C branch, short L.
  2. Find I_L: L short path: from 9A source through L (short) to ground? Assume topology: likely mesh/nodal.
    • By currents: I_L = 9A (slide: through L branch).
  3. Find V_C: C open V_C across its resistors. Nodal at C node: 3A into node with two 20Ξ© to ground? V_C= 3A * (20||20)=3*10=30V? Slide: voltage divider 20Ξ©.
    • Actual: V_C=30V (from calc).
  4. Energies Equal: w_L=1/2 L I_L^2 =1/2 4e-3 81= 0.162 J. w_C=1/2 C V_C^2=0.162 C= 20.162 / 900 = 0.00036 /0.9 wait: 0.324/900=3.6e-4 F=360ΞΌF? Slide:90ΞΌFβ€”adjust: L=4mH=0.004H, I_L=9A, 1/20.00481=0.00440.5=0.162J. V_C= ? Slide:64V? From divider: assume 20+20=40Ξ© for 3A? 3A through 20||20=10Ξ©, but sources.
    • Per slide: I_L=9A, V_C= ? Equate 1/2 C V_C^2 =1/2 L I_L^2 C= L I_L^2 / V_C^2.
    • From circuit: V_C=80V? Slide calc: 64*10^{-3}9 / (V_c^2 /2 ) wait no: C= (L I^2)/ V^2 = (0.00481)/ V^2=0.324 /V^2.
    • If V=60V, C=0.324/3600=9e-5=90ΞΌF. Yes, V_C=60V from circuit (3A*20Ξ©=60V).
  • Allowed: DC steady (tβ†’βˆž, constants); ideal elements. Rare: If AC, full transient needed (next lec).

Circuit Diagram (Mermaid Flow for Topology):

graph TD
    A[3A src] --> B[20Ξ©]
    B --> C[node1]
    C --> D[20Ξ© to gnd]
    C --> E[C open]
    F[9A src] --> G[6Ξ©?]
    G --> H[L short=4mH]
    H --> I[20Ξ© to gnd?]
    J[VC across E branch]

(Approximate; actual: branched with shared nodes.)

Summary

  • C: integrates i to v, open in DC ss, v continuous.
  • L: integrates v to i, short in DC ss, i continuous.
  • Energy: quadratic in v/i.
  • Interconnects: like R but swapped (C par add, ser recip; L ser add, par recip).

πŸ”— Resources

  • Presentation:

❓ Post lecture

  • Why v_C continuous but i_C not? (Charge conservation; sudden i would require ∞ dv/dt.)
  • When does steady-state not apply? (Transient, AC; use full diff eq next week.)
  • Quiz: For series C, why same Q? (No charge accumulation at junctions.)

πŸ“– Homework

  • SGH posted: Solve C/L energy, equiv, steady-state problems.
  • Practice: Redo examples; compute for given circuit equiv C/L.
  • Prep: First-order transients (next: RC/RL circuits).